New 
Senior Quantum Engineer
 Microsoft | |
 United States, California, Santa Barbara | |
 Oct 24, 2025 | |
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OverviewMicrosoft's mission is to empower every person and every organization on the planet to achieve more. AtMicrosoftQuantum, we aim to empower science and scientists to solve the world's biggest problems by realizing advanced computing platforms at the intersection of high-performance computing, artificial intelligence, and quantum information technology. We are looking for a diverse set of talented and focused people to accelerate the delivery of useful quantum computers. Microsoft has an internal program pursuing topological qubits for large-scale quantum computing. We are also working closely with a growing list of companies to advance quantum computer systems at every layer of the stack and bring them to market on the Microsoft Quantum accelerator platform. We believe AI can accelerate both the creation of useful quantum computers and bring-in the timelines for their realization. For more information about the Microsoft Quantum team, please visithttps://quantum.microsoft.com/ The Quantum Design team at Microsoft is seeking a Senior Quantum Engineer to design and simulate the performance of next-generation qubit chips. This role offers a unique opportunity to shape revolutionary technology and accelerate progress toward scalable quantum computing based on topological qubits. As a Senior Quantum Engineer, you will take a key role in designing Quantum Processor Unit (QPU) chips, including wiring, layout, and interfaces, ensuring seamless integration with control and readout layers. You will collaborate closely with experts in systems design, fabrication, packaging, and control in an environment that values innovation, adaptability, and interdisciplinary expertise.
ResponsibilitiesDesign & Layout: Develop Quantum Processing Unit (QPU) chip designs and interfaces to readout/control layers using simulation-driven, fabrication-aware workflows. Radio Frequency (RF) Simulation: Perform RF simulations of QPU chips and interface layers to define design requirements and optimize control/readout performance. Cross-Team Collaboration: Partner with fabrication, systems, packaging, and control teams to co-design QPUs, incorporating constraints and requirements. Tool Development: Build and maintain design tools, functionalize devices into models, and enable co-design with internal teams and external partners. Process Optimization: Apply integrated circuit design principles and engineering best practices to improve design processes and recommend optimizations. Other: Embody our Culture and Values | |